Filtered Derivative
The FixPt Filtered Derivative realization is a masked
subsystem that performs discrete-time filtered differentiation. For this
method, differentiation is approximated by the z-domain transfer
function
where Ts is the sampling period and p
is a pole on the unit circle. The transfer function yields the difference
equation
where k is the time step, y(k)
is the current output, y(k - 1) is the output from
the previous time step, u(k) is the current input, and u(k
- 1) is the input from the previous time step.
Parameters and Dialog Box
-
Sample time
-
The time interval, Ts, between samples
-
Pole of filter
-
The pole, p, is defined in the z plane so poles inside the
unit circle are stable
-
Base data type
-
The processor's base data type
-
Accumulator data type
-
The processor's accumulator data type
Model Design Review
A brief review of the model design is given below.
The design criteria reflect these rules.
-
Using the Accumulator data type for the first FixPt Sum block would
rarely be advantageous. Both inputs are given by the Base data Type
with identical scaling so using the same data type for the output makes
sense. Also, the subsequent block is a gain, and its input should be the
Base data type or smaller. The input values to this block should
be close so the subtraction can be safely carried out using the Base
data type.
-
The gains involve multiplication which is a size-growing operation. In
most cases, it is desirable for gain and input to use the word size given
by the Base data type or smaller. The output can be left at the
Accumulator data type for extra precision in subsequent operations.
Alternatively, if the output were stored to RAM, or used by a size-growing
operation, it could be reduced to the Base data type.
-
The second FixPt Sum block converts inputs to the output data type before
performing the actual addition. Given this order of operation, using Accumulator
data type often gives better precision.
-
The FixPt Conversion block forces the output to the Base data type
before storage in RAM (i.e., before input to the unit delay). Converting
the output in the feedforward part of the realization prevents subsequent
operations from being burdened with a large data type.
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